1. Field
The present embodiment relates to a parameter control circuit automatically controlling a circuit characteristic in accordance with an operation clock.
2. Description of the Related Art
The present embodiment relates to a technique for controlling a peaking in a circuit which transmits a high-frequency signal.
In recent years, an information amount to be processed has been increasing in computer and communication fields. In order to deal with the information amount which tends to be increased, a computing speed of an LSI (Large Scale Integrated circuit) is increased, and there is required to transmit a high-frequency signal in a digital data transmitting and receiving circuit with a cable, an analog circuit of a high-frequency wireless device and the like. For instance, in a data transmission circuit performing a data communication at high speed, there is a need to convert a plurality of low-speed parallel signals into high-speed serial signals. Further, high-speed clock signals which determine operation timings of these circuits are also required. Generally, when a transmission rate of data is high, an operating speed of an output driver at a transmitting side is fast, so that the clock signal of high-frequency according to the operating speed becomes necessary, and a speeding up of the circuit itself is an important task.
For example, in a circuit performing a data transmission using a clock of high speed, a peaking (overshoot or the like) is generated in a signal wave form of the data to transmit. Due to the generation of the peaking, the signal wave form may be distorted or a voltage higher than a withstand voltage may be applied to the circuit. In order to prevent this, there is known a method in a conventional art called “inductor peaking” in which the peaking is suppressed using the inductor. In other words, it is a method to suppress the peaking by optimizing a value of the inductor so that it has a characteristic being optimal for a frequency of a signal to transmit.
For instance, Patent Document 1 (Japanese Laid-open Patent Publication No. 2002-217483) discloses a technique for reducing the overshoot in a laser diode drive circuit by coupling inductors in series with both pull-up resistors at a non-inverted output side and an inverted output side of a differential amplifier.
However, a state of peaking is determined based on a load resistor of a circuit, a small signal parameter of a transistor, a capacitance value of an output node or the like. For instance, when the inductor takes a value larger than an optimal value, a state called an over-peaking is generated, resulting that a signal wave form to transmit is distorted. On the contrary, when the value of inductor becomes smaller than the optimal value, a frequency band becomes narrow, which eliminates a chance to deal with a speed up of the circuit.
Generally, a circuit design is conducted so that the inductor takes the optimal value, and it is difficult to be changed after manufacturing the LSI. Meanwhile, a value of a resistor, the small parameter of the transistor, a capacitance or the like varies depending on a variation in a manufacturing process of a semiconductor, a change in a temperature and a voltage when operating the LSI, or the like, so that the optimal value of the inductor also varies.
As described above, the optimal value of the inductor varies depending on various causes, and it is difficult to uniquely determine, at the time of design, the optimal value of the inductor with which the peaking is not generated all the time. Particularly, if a manufacturing variation becomes large because of a miniaturization of a semiconductor process, it becomes further difficult to manufacture mass-produced products with stabilized quality.